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Bit Error Ratio Tester


112Gbps/ch Bit Error Ratio Tester

Semight Instruments 112Gbps/Ch Bit Error Ratio Tester PBT8812/PBT4412 is a high-performance bit error ratio tester (BERT) applied to high-speed serial signal error rate test, which can be used for physical layer characterization and consistency test. It covers emerging 200/400/800GbE and CEI-112G standards by virtue of support for 4-level pulse amplitude modulation (PAM4) signals with up to 56Gbaud symbol rate (equivalent to 112Gbit/s), as well as non-return-to-zero (NRZ) signals.


  • Hardware FEC

    Supports protocol-compliant hardware
    FEC analysis
  • Rich pattern

    Support PRBS7~31Q
    SSPRQ/JP03A/JP03B/LIN/Square wave/CJT/user-defined patterns
  • Link compensation

    Supports 64-order CTLE receiver equalization
    Supports pre-emphasis and de-emphasis in 3rd/7th order mode
  • Error injection

    Support error injection and input and output polarity switching

Features and Benefits

  • Real FEC Analysis 

    SNR Monitor
    PreBER/PostBER Measurement
    Symbol Error Distribution
    FEC Margin test
  • Real-time data monitoring

    Real-time bit error monitoring
    Stay informed about emergencies during testing
  • Historical data query

    Data store local database
    Call test records at any time

Technical Specifications

*SSPRQ Pattern @ 53.125 Gbaud, differential eye diagram @ Keysight DCA 1092C

Pattern Generator Indicators

Output type PAM4/NRZ
Termination Differential 100 Ω, Single-ended 50 Ω; AC-coupled

Data patterns

PRBS 7/9/11/13/15/16/23/31, PRBS7~31Q
SSPRQ, JP03A/03B, LIN, CJT, Square Wave
User Defined Pattern (64bits length)

Data symbol rate (Gbaud)

Frequency accuracy (Typical) ±50 ppm
Maximum output amplitude (differential) 650 mVp-p
Rise time (20%–80%) <10 ps
Fall time (20%–80%) <10 ps
Data output RMS jitter <350 fs
Connector 1.85 mm female,50Ω
②Net measured value at Tx port.

③Measured with 56.25Gbps NRZ signal.

Trigger Output Indicators

Output amplitude >300 mVp-p
Output type AC-coupled, Single-ended

Frequency division ratio (settable)

Connector 2.92 mm female,50Ω
Trigger output Remotely switching clock output port with built-in RF switch. (Trig A for Ch1~4 and Trig B for Ch5~8)

Error Detector Indicators

Input type Differential PAM4/NRZ
Termination AC-coupled
Input impedance 100Ω
Receiving amplitude (differential) 100 ~ 650 mVp-p
Receiving sensitivity (differential) 100 mVp-p
Data patterns PRBS 7/9/11/13/15/16/23/31,PRBS7~31Q

Data symbol rate (Gbaud)

SNR indicator Support
Clock mode Built-in clock recovery
Synchronization type Auto Synchronization (level/phase)
Connector 1.85 mm female,50Ω

① Net measured at Rx port.
② BER might reach to E-3 level or even LOS while input signal <100mVp-p.
③ Optional.

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