The probability is a problem of the test process. After the configuration is completed, it is necessary to judge the locking status of the module before starting the bit error test

After confirming that the test environment is OK, it is necessary to adjust the pre emphasis according to the environment and the product, as shown in the following figure

Judging from the distribution, the channel has burst errors, so the error after correction is > 0, because the symbol err distribution exceeds the theoretical error correction ability of FEC (< 15) The bit error rate of e-9 is the average bit error rate. It is not easy to see sporadic burst errors hidden in it
FEC error correction capability analysis: the following figure shows the extreme scenarios of the above two cases The error distribution of both figures can meet the error rate of 0 after FEC correction. However, if there is one more column in the figure above and one more bit in the figure below, FEC cannot be corrected

Causes of sporadic large errors: channel crosstalk, link loss, DFE equalization processing, etc. may all cause sudden errors. At a certain time, on some data packets, there are some burst errors beyond the ability of the error correction algorithm. It can be distributed continuously in a large area in a data packet at a moment, or it can appear randomly in every symbol, but the number of occurrences is enough All these will lead to unrecoverable data packets at this moment

For each pam4 symbol (2bits), the method of converting digital code into analog level is MSB + LSB / 2 to achieve output changes of four levels